Difference between revisions of "Speaking Wall Art"
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+ | [[File:SPO256_Full_Panel.jpg]] | ||
+ | |||
+ | = Construction = | ||
+ | Nine Panels of Vero Stripboard<br /> | ||
+ | Eighty One Strips Horizontal | ||
+ | |||
+ | = Dimensions = | ||
+ | Length 28.5 inches<br /> | ||
+ | Height 8.5 inches<br /> | ||
+ | Depth 0.75 inches | ||
+ | |||
+ | = Wiring Color Code = | ||
+ | Green - Eight Line Data Bus<br /> | ||
+ | Yellow - Twelve Line Address Bus<br /> | ||
+ | Blue - Twelve Control Data Lines<br /> | ||
+ | Orange - Eight Chip Select Lines<br /> | ||
+ | Brown - Six Serial and Parallel Control Input Lines<br /> | ||
+ | Red - Five Volt Positive Power<br /> | ||
+ | Black - Ground Power<br /> | ||
+ | Grey - Miscellaneous Wiring<br /> | ||
+ | White - Clock Line Wiring | ||
+ | |||
+ | = Random Information = | ||
+ | * Application note used is dated 1986 | ||
+ | * The SPO256 chip recieves parallel data from the address lines in this implementation | ||
+ | * The text to speech algorithm used in the CTS256 chip was developed at Naval Research Labs in the 1970's | ||
+ | * The External EPROM is "erased" by UV light, ambient room light will cause problems after (alot of) years | ||
+ | * The application note has a different Parallel Panel schematic than the one supplied with the CTS256 chip | ||
+ | * Parallel Panel has Eight Data and Two Control pins mid board edge and break the aesthetic | ||
+ | * The 3.12 Mhz Crystal for the SPO256 is difficult to get, so this implementation uses a 3.2 Mhz Crystal | ||
+ | * JAC_101 has sworn not to do another project with the SPO256 chip, because he is out of them | ||
+ | |||
+ | = Panel Breakdown = | ||
+ | |||
{| class="wikitable" style="width: 98%" | {| class="wikitable" style="width: 98%" | ||
! style="width: 10%; background-color: white;"| Front Image | ! style="width: 10%; background-color: white;"| Front Image | ||
! style="width: 70%; background-color: white;"| Text Description | ! style="width: 70%; background-color: white;"| Text Description | ||
! style="width: 10%; background-color: white;"| Fritz Image | ! style="width: 10%; background-color: white;"| Fritz Image | ||
− | |||
|- | |- | ||
− | | | + | | [[File:SB_SPO256A.jpg|x100px]] |
− | | | + | | SPO256-AL2 Voice Synthesizer IC |
| [[File:SWA_SPO256A-AL2.jpg|x100px]] | | [[File:SWA_SPO256A-AL2.jpg|x100px]] | ||
− | |||
|- | |- | ||
− | | | + | | [[File:SB_Audio.jpg|x100px]] |
− | | | + | | Audio Amplifier based on LM386 |
| [[File:SWA_Audio-Amp.jpg|x100px]] | | [[File:SWA_Audio-Amp.jpg|x100px]] | ||
− | |||
|- | |- | ||
− | | | + | | [[File:SB_CTS256A.jpg|x100px]] |
− | | | + | | CTS256A-AL2 Text-To-Speech Controller IC |
| [[File:SWA_CTS256A.jpg|x100px]] | | [[File:SWA_CTS256A.jpg|x100px]] | ||
− | |||
|- | |- | ||
− | | | + | | [[File:SB_Logic.jpg|x100px]] |
− | | | + | | System Function Selection with Decoder/Demultiplexer (74LS138) and HEX Inverter (74LS14) |
| [[File:SWA_Logic.jpg|x100px]] | | [[File:SWA_Logic.jpg|x100px]] | ||
− | |||
|- | |- | ||
− | | | + | | [[File:SB_Latch.jpg|x100px]] |
− | | | + | | Data and Address Bus Exchange with Latch (74LS373) |
| [[File:SWA_Latch.jpg|x100px]] | | [[File:SWA_Latch.jpg|x100px]] | ||
− | |||
|- | |- | ||
− | | | + | | [[File:SB_RAM.jpg|x100px]] |
− | | | + | | External RAM (TMS4016-25) Buffer For Text Conversion |
| [[File:SWA_RAM.jpg|x100px]] | | [[File:SWA_RAM.jpg|x100px]] | ||
− | |||
|- | |- | ||
− | | | + | | [[File:SB_EPROM.jpg|x100px]] |
− | | | + | | External EPROM (2732A-70) For Custom Text To Allophone Conversion |
− | | [[File: | + | | [[File:EEPROM.jpg|x100px]] |
− | |||
|- | |- | ||
− | | | + | | [[File:SB_UART.jpg|x100px]] |
− | | | + | | Serial Data Transfer Configuration Module with Latch (74LS373) |
| [[File:SWA_UART_Board.jpg|x100px]] | | [[File:SWA_UART_Board.jpg|x100px]] | ||
− | |||
|- | |- | ||
− | | | + | | [[File:SB_Parallel.jpg|x100px]] |
− | | | + | | Parallel Data Input Option with Octal Latch (74LS374) and D-Type Flip/Flop (74LS74) |
| [[File:SWA_Parallel_Board.jpg|x100px]] | | [[File:SWA_Parallel_Board.jpg|x100px]] | ||
− | |||
|- | |- | ||
− | | | + | | [[File:SPO256_Full_Panel.jpg|x100px]] |
− | | | + | | Full Panel From Application Notes |
− | | | + | | [[File:SPO256_Basic_Application_Note.jpg|x100px]][[File:SPO256_Options_Apllication_Note.jpg|x100px]] |
− | | | ||
|} | |} | ||
+ | |||
+ | Prior Implementations: | ||
+ | |||
+ | http://wiki.lvl1.org/Speech_Synthesizer,_Now_from_the_Past | ||
+ | |||
+ | http://wiki.lvl1.org/Text_to_Speech_Synthesizer | ||
+ | |||
+ | And what will this device be speaking for: | ||
+ | |||
+ | http://wiki.lvl1.org/Disturbing_Robot_Project |
Latest revision as of 12:35, 19 April 2012
Construction
Nine Panels of Vero Stripboard
Eighty One Strips Horizontal
Dimensions
Length 28.5 inches
Height 8.5 inches
Depth 0.75 inches
Wiring Color Code
Green - Eight Line Data Bus
Yellow - Twelve Line Address Bus
Blue - Twelve Control Data Lines
Orange - Eight Chip Select Lines
Brown - Six Serial and Parallel Control Input Lines
Red - Five Volt Positive Power
Black - Ground Power
Grey - Miscellaneous Wiring
White - Clock Line Wiring
Random Information
- Application note used is dated 1986
- The SPO256 chip recieves parallel data from the address lines in this implementation
- The text to speech algorithm used in the CTS256 chip was developed at Naval Research Labs in the 1970's
- The External EPROM is "erased" by UV light, ambient room light will cause problems after (alot of) years
- The application note has a different Parallel Panel schematic than the one supplied with the CTS256 chip
- Parallel Panel has Eight Data and Two Control pins mid board edge and break the aesthetic
- The 3.12 Mhz Crystal for the SPO256 is difficult to get, so this implementation uses a 3.2 Mhz Crystal
- JAC_101 has sworn not to do another project with the SPO256 chip, because he is out of them
Panel Breakdown
Prior Implementations:
http://wiki.lvl1.org/Speech_Synthesizer,_Now_from_the_Past
http://wiki.lvl1.org/Text_to_Speech_Synthesizer
And what will this device be speaking for: